#### Example 5.4

## Non-coherent PLL-based FSK detection

The phase-locked loop (PLL), is frequently used in symbol and carrier recovery circuits for digital communications systems. The basic operation of the PLL is described here in connection with its use as an FSK detector. For a more detailed discussion of PLL systems there is an excellent book by Gardner (1966). The PLL consists of three building blocks: a voltage controlled oscillator whose output frequency is proportional to the input voltage, a phase detector (often implemented using a multiplier or exclusive-or gate) which produces a voltage output proportional to the phase difference between the two inputs, and a loop filter which is used to control the dynamics of the feedback circuit. |

The PLL acts by comparing the phase of the input signal with that of the VCO and using the voltage generated by the phase difference to alter the frequency and phase of the VCO to match that of the input. The system reaches a stable steady state when the average output from the phase detector is zero, implying that the VCO is phase-locked to the input signal. (With mixer-based phase detectors, there is a 90o phase difference between input and VCO in the phase-locked state.) Because the VCO control voltage must change in order for the PLL to track and lock onto a new input frequency, it provides a direct measure of the input signal frequency for each symbol in the FSK stream and hence acts as a first-class detector.