## Parity

A basic requirement of the ARQ system is for the receiving equipment to be able to detect the presence of errors in the received data. One of the simplest yet most frequently used techniques for detecting errors is the parity check bit. Most people who have set up a modem for a computer link will have found a setting for odd or even parity alongside the number of stop bits, and so on. The parity check bit is usually a single bit (1 or 0) appended to the end of a data word such that the number of 1s in the new data word is even for even parity, or odd for odd parity. Thus for the first example data word shown here, a 0 must be added as the parity bit for an even parity design because the number of 1s in the word is already even. For the second word, there is an odd number of 1s so a logic 1 parity bit is added to make this number even. |

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